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Chip to Chip Communication Protocols: An Overview and Design Considerations

by: Apr 24,2021 7970 Views 0 Comments Posted in PCB Design Tutorial

SPI I2C UART

Summary:       Here some of the key features of Chip to Chip Communication Protocols are discussed along with some design rules to ensure high fidelity communication can be established.

Almost all PCBs will contain multiple ICs, which needs to communicate with each other. Similarly, many designs require data transfer among multiple PCBs. The most common protocols used in these types of communications are SPI, I2C and UART.

Here some of the key features of these protocols are discussed along with some design rules to ensure high fidelity communication.

SPI (Serial Peripheral Interface):

SPI is a synchronous duplex communication protocol, which means data can be transferred and received at the same time. It generally uses 4 wires: Master Out Slave In (MOSI), Master In Slave Out (MISO), Serial Clock (SCLK), and Chip Select (CS). A typical SPI communication is shown in the figure below.


 One master can communicate with several slave, but each slave will require a chip select signal. This means for n number of slaves the master will require n+3 pins. 

The speed of SPI communication can reach upto 100MHz. However, to communicate at high speed several additional circuitry might be needed. The most common problem of high speed SPI signal is overshoot and ringing. A simple way to tackle this problem is to use add small series resistance in the signal path. If the communication distance is long, a buffer should be used for the output and clock lines. A sample buffer circuit is shown below:



I2C (Inter-Integrated Circuit):

I2C standard is widely used communication between ICs. It uses a data line (SDA) and a clock line (SCL) for communication. There is no limitation on the number of slaves that can be connected to one master as long as the bus input capacitance is within the limit of the I2C standard. It can support speed up to 5MHz.



It is an open-drain communication standard, which means a pull-up resistor is needed. This enables ICs with different supply voltage to connect to the same bus. The value of the pull resistor is an important design consideration. If we use a low resistor the IC will not be able to pull the line LOW. If the is low-level voltage VOL and is the sink current IOL, the minimum allowable pull-up resistance can be defined as:

 

On the other hand, if we use a very high pull-up resistor, it will take long time to charge the input capacitor. Hence the signal may not reach logical high before pulled low. This is especially relevant for high speed data transfer. If tr is the rise time of the signal and Cb is the capacitance of the bus, then maximum allowable pull-up resistance can be defined as[1]:

UART (Universal Asynchronous Receiver Transmitter):

UART is a protocol where two chips are directly connected. The Tx of one chip is connected to the Rx of the other and vice-versa. This is not a scalable protocol, meaning that only two chips can talk to each other using one UART line. The block diagram of UART communication is shown below:

It does not transmit any clock, so the receiving chip must know at what speed the other chip is transmitting at. Similar to SPI, it is good practice to add a series resistor in the UART line to compensate for the overshoot and ringing. Since the signals are single ended, it is more prone to noise, specially for long distance. Sometimes two other signal, CTS (Clear to Send) and RTS (Request to Send) is added to improve the fidelity of the communication.


Reference:

[1] https://www.ti.com/lit/an/slva689

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